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IEEE/ICACT20240330 Slide.18        [Big Slide]	Oral Presentation
	Lastly, we have implemented and evaluated the |Y> state distillation processes for logical S gate. We validated the distillation circuit by implementing two methods based on the lattice surgery model and evaluating the cost of each method. As a next step, we will implement and evaluate the |A> state distillation processes for the logical T gate.

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